The cusps shown in the transfer curve of Fig. A2 result from the assumption that the
amplifiers are hard limiting. In a real circuit, the effect of the cusps can be made to be
minimal.
There is one serious problem with a circuit like the one described: the minimum input
voltage required to limit a single-stage silicon transistor is about 100 mV at room
temperature, and that is when the amplifier is not fed back in any manner. Thus the start
of logging would be at about 20 mV input for the above circuit, which means that to get a
4-decade dynamic range, input signals would have to go as high as 200 volts!
This problem can be circumvented by using a circuit architecture like the one shown
below in Fig. A3.
Fig. A3
A1 and A2 are linear amps, and remain linear up to a voltage which is sufficient to limit the
log stages L1 ... L4 (about 500 mV).
Fig. A4; Logging and Summing Amplifiers
-A3-
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